Semiconductor device

ABSTRACT

There is provided a semiconductor device including a substrate whose surface is made of an insulation material, a semiconductor chip flip-chip connected on the substrate, and a heat sink bonded to the semiconductor chip via a thermal interface material and fixed to the substrate outside the semiconductor chip, in which the heat sink has a protrusion part protruding toward the substrate and bonded to the substrate via a conductive resin between a part bonded to semiconductor chip and a part fixed to the substrate and the heat sink has a stress absorbing part. According to the present invention, the protrusion part of the heat sink is prevented from being peeled off from the substrate at the part where the protrusion part of the heat sink is bonded to the substrate.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is based on and claims the benefit of priority from theprior Japanese Patent Application No. 2015-023153, filed on Feb. 9,2015, the entire contents of which are incorporated herein by reference.

FIELD

The present invention relates to a semiconductor device and inparticular to a technique for a flip-chip bonding (FCB) package with alow-stress heat sink.

BACKGROUND

According to increase in the speed of the operation of a semiconductordevice and the number of inputs/outputs thereof, heat generated from thesemiconductor device also increases. For this reason, there has beenknown a semiconductor package in which a heat sink is bonded to asemiconductor chip. There also has been known that a ground isstabilized such that the heat sink is connected to the ground of asubstrate of the package to decrease noise of a high speed device.

A Japanese Patent Laid-Open No. 2012-33559, for example, discloses asemiconductor device in which a heat radiation member is embedded in asealing member for embedding a semiconductor chip to improve heatradiation. According to the semiconductor device disclosed in theJapanese Patent Laid-Open No. 2012-33559, an appropriate surface area ofthe heat radiation member can improve the heat radiation of thesemiconductor device, which allows the thermal resistance thereof to bereduced.

However, it may cause a problem that the heat sink provided forimproving the heat radiation is peeled off by stress accompanied withthermal expansion or thermal shrinkage.

SUMMARY

A semiconductor device according to an embodiment of the presentinvention including a substrate whose surface is made of an insulationmaterial, a semiconductor chip flip-chip connected on the substrate, anda heat sink bonded to the semiconductor chip via a thermal interfacematerial and fixed to the substrate outside the semiconductor chip,wherein the heat sink has a protrusion part protruding toward thesubstrate and bonded to the substrate via a conductive resin between apart bonded to semiconductor chip and a part fixed to the substrate andthe heat sink has a stress absorbing part.

The stress absorbing part may has lower rigidity than the part excludingthe stress absorbing part of the heat sink.

The stress absorbing part may be thinned by a groove provided on thesurface of the heat sink opposing the substrate.

The number of the grooves provided thereon may be two or more.

The protrusion part may be arranged to surround the semiconductor chipand the stress absorbing part may be arranged inside or outside theprotrusion part.

The stress absorbing part may be arranged adjacent to the protrusionpart.

The stress absorbing part may include a bottomed hole provided in thesurface of the heat sink opposing the substrate or a through hole.

The heat sink may be made of Cu, Al, or AlSiCu ceramic.

The protrusion part may be bonded an electrode arranged on the substratevia the conductive resin, and the electrode may be electrivallyconnected to a ground.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a schematic diagram of a semiconductor device according to afirst embodiment of the present invention;

FIG. 2 is a cross section of the semiconductor device according to thefirst embodiment of the present invention;

FIG. 3A is a top view of a heat sink of the semiconductor deviceaccording to the first embodiment of the present invention;

FIG. 3B is a cross section of the heat sink of the semiconductor deviceaccording to the first embodiment of the present invention;

FIG. 4A is a top view of a heat sink of a semiconductor device accordingto a second embodiment of the present invention;

FIG. 4B is a cross section of the heat sink of the semiconductor deviceaccording to the second embodiment of the present invention;

FIG. 5A is a top view of a heat sink of a semiconductor device accordingto a third embodiment of the present invention;

FIG. 5B is a cross section of the heat sink of the semiconductor deviceaccording to the third embodiment of the present invention;

FIG. 6A is a top view of a heat sink of a semiconductor device accordingto a fourth embodiment of the present invention;

FIG. 6B is a cross section of the heat sink of the semiconductor deviceaccording to the fourth embodiment of the present invention;

FIG. 7A is a top view of a heat sink of a semiconductor device accordingto a fifth embodiment of the present invention;

FIG. 7B is a cross section of the heat sink of the semiconductor deviceaccording to the fifth embodiment of the present invention;

FIG. 8 is a cross section of a semiconductor device according to acomparative example;

FIG. 9 is a cross section of a semiconductor device according to acomparative example; and

FIG. 10 is a cross section of the semiconductor device according to thefirst embodiment of the present invention.

DESCRIPTION OF EMBODIMENTS

The present invention provides a highly reliable semiconductor devicewhich prevents the heat sink from being peeled off from the substrate bystress accompanied with thermal expansion and thermal shrinkage.

The semiconductor device according to the present invention is describedbelow with reference to the attached drawings. The semiconductor deviceaccording to the present invention can be implemented in many differentembodiments and shall not be interpreted by limiting to the descriptionof the embodiments shown below. In the drawings referred in the presentembodiments, the same components or the conponents having similarfunctions are given the same reference number and a repetitivedescription thereof is omitted.

First Embodiment

The structure of the semiconductor device according to the firstembodiment is described with reference to FIGS. 1 to 3.

[Structure of Semiconductor Device]

FIG. 1 is a schematic diagram showing a structure of a semiconductordevice 100 according to a first embodiment of the present invention. Thesemiconductor device 100 comprises a substrate 10, a semiconductor chip30 is arranged on the substrate 10 and a heat sink 20 is arranged on thesubstrate 10 and the semiconductor chip 30. The substrate 10 and theheat sink 20 are arranged in opposition to each other. Both thesubstrate 10 and the heat sink 20 has substantially the same area. Thesemiconductor device 100 is nearly cubic.

[Cross Section of Semiconductor Device]

FIG. 2 is a cross section along the line I-I′ in FIG. 1 in thesemiconductor device 100 according to the first embodiment of thepresent invention.

The substrate 10 is a package substrate (a supporting substrate) and anorganic substrate using an organic material such as polyimide or epoxyresin. The substrate 10 may be a multilayered buildup substrate.Electrodes electrically connected with the semiconductor chip 30 and aprotrusion part 22 are arranged on a surface of the substrate 10opposing the heat sink 20. An electrode electrically connected withelements except the semiconductor chip 30, an external device, oranother substrate may be appropriately arranged on another surface ofthe substrate 10. Except for the electrodes described above, thesurfaces of the substrate 10 are generally composed of insulationmaterials such as the organic material forming the substrate 10, anepoxy resin coating material coated on the substrate 10, thermosettingepoxy insulation film, or the like.

The semiconductor chip 30 is arranged on the substrate 10. Thesemiconductor chip 30 is flip-chip connected to the substrate 10 via aconductive bump 49. Cupper (Cu), silver (Ag), gold (Au), and solder maybe used as the bump 49. The semiconductor chip 30 is a semiconductorelement such as an IC chip, an LSI chip, or the like. A semiconductorelement using silicon (Si) as a main material is used as thesemiconductor chip 30, however, silicon carbide (SiC) or gallium nitride(GaN) may be used as main materials of the semiconductor chip 30. Thefirst embodiment shows an example where one semiconductor element isarranged on the substrate, however, a plurality of semiconductorelements may be arranged side by side or a plurality of semiconductorelements may be stacked one on top of another on the substrate.

An underfill 45 for fixing the semiconductor chip 30 is arranged betweenthe substrate 10 and the semiconductor chip 30. Epoxy resin, cyanateester resin, acryl resin, polyimide resin, silicone resin or the likemay be used as the underfill 45.

The heat sink 20 is arranged on the semiconductor chip 30 via a thermalinterface material 47. A known thermal conduction material (TIM) is usedas the thermal interface material 47. A heat radiation sheet, graphite,thermal conduction greaseor the like, for example, may be used as thethermal interface material 47. A material high in thermal conductivityand adhesive property is used as the thermal interface material 47 toeffectively transfer the heat of the semiconductor chip 30 to the heatsink 20. Cupper (Cu), aluminum (Al), AlSiCu ceramics or the like may beused as the heat sink 20.

A fixing part 28 protruding toward the substrate 10 is provided near theouter periphery of the heat sink 20. The fixing part 28 of the heat sink20 is fixed to the substrate 10 by an adhesive 41. The adhesive 41 maybe insulative or conductive. If the protrusion part 22 and a stressabsorbing part 26 described later are neglected, the heat sink 20 has ashape of a lid having the fixing part 28 protruding toward the substrate10, near the outer periphery of the heat sink 20. The side face of thesubstrate 10 and that of the heat sink 20 are arranged on substantiallythe same plane, however, the side face of the heat sink 20 may bepositioned nearer the center of the semiconductor device 100 than theside face of the substrate 10, or contrarily, the side face of the heatsink 20 may be positioned farther from the center of the semiconductordevice 100 than the side face of the substrate 10.

The heat sink 20 has the protrusion part 22 protruding toward theopposing substrate 10 in addition to the fixing part 28 described above.The protrusion part 22 is arranged between a part bonded to thesemiconductor chip 30 and the fixing part 28. The protrusion part 22 isbonded to the substrate 10 via a conductive adhesive 43. An electrodeelectrically connected to the ground of the substrate 10 is arranged onthe part of the substrate 10 bonded to the protrusion part 22. In otherwords, the protrusion part 22 is electrically connected with the groundof the substrate 10 via the electrode and arranged to stabilize theground of the substrate 10. It is preferable that the protrusion part 22is arranged in a position near the semiconductor chip 30 from theviewpoint of the stabilization of the ground.

The stress absorbing part 26 is arranged between the part bonded to thesemiconductor chip 30 and the protrusion part 22 on the heat sink 20 ofthe semiconductor device 100 according to the first embodiment of thepresent invention. More specifically, a recessed groove 24 is formedbetween the part bonded to the semiconductor chip 30 and the protrusionpart 22 on the surface of the heat sink 20 opposing the substrate 10. Ifthe fixing part 28 and the protrusion part 22 on the heat sink 20 areneglected, the heat sink 20 has a fixed thickness, however, the stressabsorbing part 26 is formed such that the part where the groove 24 isarranged is thinner than the periphery of the groove 24. The fixing part28, the protrusion part 22, and the groove 24 of the heat sink 20 may beformed by etching.

[Planar Configuration of Heat Sink 20]

FIG. 3A is a top view of the heat sink 20 of the semiconductor deviceaccording to the first embodiment of the present invention. FIG. 3B is across section of the heat sink 20 along the line I-I′ in FIG. 3A. Arectangular area 30′ surrounded by a dotted line shows a position wherethe heat sink 20 is bonded to the semiconductor chip 30 (not shown). Theprotrusion part 22 is arranged in a rectangular shape so as to surroundthe area 30′ bonded to the semiconductor chip 30. Furthermore, thefixing part 28 bonded and fixed to the substrate 10 (not shown) isarranged on the outer periphery of the heat sink 20. In the firstembodiment, the groove 24 (the stress absorbing part 26) is arrangedbetween the area 30′ bonded to the semiconductor chip 30 and theprotrusion part 22. Preferably, the groove 24 is arranged in proximityto a position where the protrusion part 22 is arranged. More preferably,the groove 24 is arranged adjacent to the position where the protrusionpart 22 is arranged. As is the case with the protrusion part 22, thegroove 24 (the stress absorbing part 26) is also arranged in arectangular shape so as to surround the area 30′ bonded to thesemiconductor chip 30.

The substrate 10 and the semiconductor chip 30 included in thesemiconductor device 100 use an organic substrate and silicon as mainmaterials respectively. The thermal expansion coefficient of thesubstrate 10 is about 15 ppm and that of the semiconductor chip 30 isabout 3.4 ppm. Thus, the value of the thermal expansion coefficient ofthe substrate 10 is greater than the value of that of the semiconductorchip 30. For this reason, at a low temperature (−55° C., for example) ina temperature cyclic test, the semiconductor device 100 is totallyconvexly-warped toward the upper surface (toward the upper side in FIG.2 and the surface on which the heat sink 20 is arranged) because thesubstrate 10 is greater in shrinkage. The substrate 10 is firmly bondedand fixed to the heat sink 20 by the adhesive 41 in the neighborhood ofthe outer circumference of the semiconductor device 100. The heat sink20 is firmly bonded and fixed to the semiconductor chip 30 by thethermal interface material 47. Thus, the heat sink 20 is firmly bondedand fixed to the substrate 10 and the semiconductor chip 30, so that theheat sink 20 is subjected to stress in a warping direction at a lowtemperature in the temperature cyclic test.

The heat sink 20 of the semiconductor device 100 according to the firstembodiment of the present invention has the recessed groove 24 betweenthe part bonded to the semiconductor chip 30 and the fixing part 28fixed to the substrate 10. The stress absorbing part 26 is formed in theheat sink 20 by the groove 24. In other words, the groove 24 is providedfor the heat sink 20 to form the stress absorbing part 26 in which theheat sink 20 at the part where the groove 24 is formed is thinner thanthe heat sink 20 at the part where the groove 24 is not formed. Thestress absorbing part 26 can reduce the distortion of the heat sink 20caused by heat. In other words, the stress absorbing part 26 of the heatsink 20 has lower rigidity than the surroundings thereof. Thus,arranging the part having low rigidity in the heat sink 20 allows thethermal stress of the heat sink 20 to be reduced. For example, thestress absorbing part 26 is arranged in the heat sink 20 to allow thewarp of the semiconductor device 100 to be reduced at a low temperaturein the temperature cyclic test. This can reduce stress caused by a warpof the semiconductor device 100 at the part where the protrusion part 22of the heat sink 20 is bonded to the substrate 10, which can prevent theprotrusion part 22 from being peeled off from the substrate 10 at thepart.

Second Embodiment

The outline of the semiconductor device according to the secondembodiment of the present invention is described below with reference toFIGS. 4A and 4B.

FIG. 4A is a top view of the heat sink 20 of the semiconductor deviceaccording to the second embodiment. FIG. 4B is a cross section of theheat sink 20 along the line I-I′ in FIG. 4A. The second embodiment ischaracterized in that two grooves 24 a and 24 b are arranged in the heatsink 20 to form the stress absorbing part 26. The grooves 24 a and 24 bare formed between an area 30′ bonded to the semiconductor chip 30 andthe protrusion part 22. As is the case with the groove 24 in the firstembodiment, the groove 24 a is preferably arranged in proximity to aposition where the protrusion part 22 is arranged. The groove 24 a ismore preferably arranged adjacent to the position where the protrusionpart 22 is arranged. As is the case with the groove 24 in the firstembodiment, the groove 24 a is formed in a rectangular shape viewed fromthe top so as to surround the area 30′. The grooves 24 b is arrangedbetween the groove 24 a and the area 30′ bonded to the semiconductorchip 30. As is the case with the groove 24 a, the groove 24 b is formedalso in a rectangular shape viewed from the top so as to surround thearea 30′.

In the second embodiment, the two grooves 24 a and 24 b are arrangedbetween the area 30′ bonded to the semiconductor chip 30 and theprotrusion part 22 to further reduce the rigidity of the stressabsorbing part 26 than that in the first embodiment, which allows thestress to be further reduced at the part where the protrusion part 22 ofthe heat sink 20 is bonded to the substrate 10.

Third Embodiment

The outline of the semiconductor device according to the thirdembodiment of the present invention is described below with reference toFIGS. 5A and 5B.

FIG. 5A is a top view of the heat sink 20 of the semiconductor deviceaccording to the third embodiment. FIG. 5B is a cross section of theheat sink 20 along the line I-I′ in FIG. 5A. The third embodiment ischaracterized in that a bottomed hole 24 c is arranged in the heat sink20 to form the stress absorbing part 26. The bottomed hole 24 c isarranged between the area 30′ bonded to the semiconductor chip 30 andthe protrusion part 22. Preferably, the bottomed hole 24 c is arrangedin proximity to the position where the protrusion part 22 is arranged.More preferably, the bottomed hole 24 c is arranged adjacent to theposition where the protrusion part 22 is arranged. As can be seen fromFIG. 5A, a plurality of the bottomed holes 24 c are arranged in the heatsink 20 at regular intervals along the protrusion part 22 so as tosurround the area 30′. Furthermore, a plurality of the bottomed holes 24c may be further arranged at regular intervals along the inside of anarea where the bottomed holes 24 c are arranged so as to surround thearea 30′.

Thus, in the third embodiment, the groove 24 is not formed in the heatsink 20 unlike the first embodiment, instead, a plurality of thebottomed holes 24 c are arranged in the heat sink 20 to form the stressabsorbing part 26, which can reduce stress caused by a warp of thesemiconductor device 100 at the part where the protrusion part 22 isbonded to the substrate 10, as is the case with the first embodiment.

Fourth Embodiment

The outline of the semiconductor device according to the fourthembodiment of the present invention is described below with reference toFIGS. 6A and 6B.

FIG. 6A is a top view of the heat sink 20 of the semiconductor deviceaccording to the fourth embodiment. FIG. 6B is a cross section of theheat sink 20 along the line I-I′ in FIG. 6A. The fourth embodiment ischaracterized in that a through hole 24 d, which serves as the stressabsorbing part 26 and passes from the surface opposing the substrate 10to the surface being the outside of the semiconductor device, isarranged in the heat sink 20. The through hole 24 d may be arranged inthe same position as that where the bottomed hole 24 c shown in thethird embodiment is arranged. Preferably, the through hole 24 d isarranged in proximity to the position where the protrusion part 22 isarranged. More preferably, the through hole 24 d is arranged adjacent tothe position where the protrusion part 22 is arranged.

In the fourth embodiment, rigidity is lowered around the part where aplurality of the through holes 24 d (the stress absorbing parts 26) arearranged in the heat sink 20. This can reduce stress caused by a warp ofthe semiconductor device 100 at the part where the protrusion part 22 isbonded to the substrate 10, as is the case with the first embodiment.

Fifth Embodiment

The outline of the semiconductor device according to the fifthembodiment of the present invention is described below with reference toFIGS. 7A and 7B.

FIG. 7A is a top view of the heat sink 20 of the semiconductor deviceaccording to the fifth embodiment. FIG. 7B is a cross section of theheat sink 20 along the line I-I′ in FIG. 7A. The fifth embodiment ischaracterized in that a groove 24 e is arranged outside the protrusionpart 22, that is to say, between the protrusion part 22 and the fixingpart 28 to form the stress absorbing part 26, unlike the firstembodiment. Preferably, the groove 24 e is arranged in proximity to theposition where the protrusion part 22 is arranged. More preferably, thegroove 24 e is arranged adjacent to the position where the protrusionpart 22 is arranged. The groove 24 e is arranged outside the protrusionpart 22 to also allow the stress to be reduced at the part where theprotrusion part 22 is bonded to the substrate 10, as is the case withthe first embodiment in which the groove 24 is arranged inside theprotrusion part 22.

Other Embodiments

The first to fifth embodiments of the present invention are describedabove with reference to FIGS. 1 to 7B. However, the present invention isnot limited to the above embodiments. The present invention can beimplemented by appropriately modifying the above embodiments within arange not deviated from the gist of the invention or combining theembodiments with each other.

The first embodiment, for example, shows an example where the groove 24is continuously arranged in a rectangular shape. However, the groove 24may be intermittently arranged so as to surround the area 30′.Alternatively, a groove may be arranged in parallel to each side of theprotrusion part 22 formed in a rectangular shape and bottomed holes orthrough holes may be formed at parts corresponding to the cornersthereof. The grooves 24 and 24 e may be arranged inside and outside ofthe position where the protrusion part 22 is arranged respectively bycombining the first embodiment with the fifth embodiment. Although theexample where the groove 24 is formed in a concave shape is shown above,the groove 24 may be formed in other different shapes such as acircular, a triangular shape, and others. The stress absorbing part 26formed by the groove 24 or the like only has to be arranged between thepart where the heat sink 20 is bonded to the semiconductor chip 30 andthe fixing part 28 where the heat sink 20 is bonded and fixed to thesubstrate 10. It is preferable that the stress absorbing part 26 isarranged in a position near the protrusion part 22 from the viewpoint ofthe reduction of stress at the part where the protrusion part 22 isbonded to the substrate 10.

The first to third and fifth embodiments describe that the groove 24 orthe like are arranged in the surface, opposing the substrate 10, of theheat sink 20, however the embodiments of the present invention are notlimited to the above. The groove and the bottomed hole may be arrangedin the surface opposite to the surface opposing the substrate 10, thatis to say, in the surface exposed outside the semiconductor device 100.

[Simulation]

The following shows the results of a stress simulation for thesemiconductor device according to an embodiment of the present inventionand a comparative example thereof.

STRUCTURE OF COMPARATIVE EXAMPLES

FIG. 8 is a cross section of a semiconductor device 700 according to thecomparative example. The semiconductor device 700 comprises a glassceramic substrate 710. The glass ceramic substrate small in transmissionloss is often used in a semiconductor package of a high-speed device. Asemiconductor chip 730 is flip-chip connected on the glass ceramicsubstrate 710 via a bump 749 and a lid-like heat sink 720 is bonded tothe upper surface of the semiconductor chip 730 via a thermal interfacematerial 747. The heat sink 720 is bonded and fixed to the glass ceramicsubstrate 710 by an adhesive 741 at the outer circumferential part ofthe glass ceramic substrate 710. An underfill 745 is arranged betweenthe substrate 710 and the semiconductor chip 30.

The heat sink 720 has a protrusion part 722 protruding toward the glassceramic substrate 710 outside the area bonded to the semiconductor chip730. The protrusion part 722 is bonded to the glass ceramic substrate710 via a conductive adhesive 743 and electrically connected to theground of the glass ceramic substrate 710.

Materials used as the main components of the semiconductor device 700are given below. The lid-like heat sink 720 uses copper, thesemiconductor chip 730 uses silicon, and the glass ceramic substrate 710uses glass ceramic. The thermal expansion coefficients of the materialsused as the components are given below. Those of copper, silicon, andglass ceramic are about 15 ppm, about 3.4 ppm, and about 9.5 ppmrespectively. For this reason, at a low temperature (−55° C., forexample) in the temperature cyclic test at the manufacturing process ofsemiconductor device 700, the semiconductor device 700 isconvexly-warped upward in FIG. 8 caused by the mismatch among thethermal expansion coefficients of the components. However, for the glassceramic substrate 710, the warp is suppressed comparatively smaller,which hardly causes a problem that the parts where the components areboned to each other are peeled off.

A substrate adaptable to a high-speed device has been developed inrecent years also in an organic substrate such as a buildup substrate.The organic substrate which is less expensive than a glass ceramicsubstrate is often used as the package substrate for the high-speeddevice. FIG. 9 shows a cross section of a semiconductor device 800according to a comparative example. The semiconductor device 800 shownin FIG. 9 is the same as the semiconductor device 700 shown in FIG. 8 instructure, however, the semiconductor device 800 is different from thesemiconductor device 700 in that an organic substrate 810 is used as apackage substrate.

Materials used as the main components of the semiconductor device 800are given below. A lid-like heat sink 820 uses copper, a semiconductorchip 830 uses silicon, and the organic substrate 810 is a substrateincluding an organic material. The thermal expansion coefficients of thematerials used as the components are given below. Those of copper,silicon, and the organic substrate are about 15 ppm, about 3.4 ppm, andabout 15 ppm respectively. Therefore, the organic substrate 810 shown inFIG. 9 is greater than the glass ceramic substrate 710 shown in FIG. 8in the thermal expansion coefficient. At a low temperature (−55° C., forexample) in the temperature cyclic test, even the semiconductor device800 using the organic substrate 810 as the package substrate isconvexly-warped upward in FIG. 9. At this point, the parts where thecomponents are boned to each other can be peeled off because the organicsubstrate 810 is greater than the glass ceramic substrate 710 shown inFIG. 8 in the warp. The application of stress to the part where theprotrusion part 822 of the heat sink 820 is bonded to the organicsubstrate 810 can cause release the protusion part 822 and the organicsubstrate 810, which may cause a problem that makes it difficult to keepthe stability of a ground potential.

EXAMPLE

FIG. 10 shows a cross section of a semiconductor device 100 according toone embodiment of the present invention. The semiconductor device 100shown in FIG. 10 is the same as the semiconductor device 100 describedin the first embodiment in structure. Materials used as the maincomponents of the semiconductor device 100 are given below. Thesubstrate 10 uses the organic substrate including an organic material,the heat sink uses copper, the adhesive 41 uses epoxy resin, theunderfill 45 uses epoxy resin, the conductive adhesive 43 uses Ag paste,and the thermal interface material 47 uses a metal. The heat sink 20 isin a square shape, the length “a” of one side thereof is 26.5 mm and thethickness “b” thereof is 0.5 mm, the width “c” of the groove 24 is 4 mmand the depth “d” thereof is 0.3 mm, the length “e” of the protrusionpart 22 is 0.3 mm and the thickness “f” thereof in the planar directionis 0.5 mm, the length “g” of the fixing part 28 is 0.7 mm and thethickness “h” thereof in the planar direction is 2 mm, and a distance“i” between the two protrusion parts 22 where the semiconductor chip 30is arranged is 16 mm. The semiconductor chip 30 is in a square shape,the length “j” of one side thereof is 11 mm, and the semiconductor chip30 is arranged at the center of the square substrate 10 and the heatsink 20. The length “k” of one side of the substrate 10 is 27 mm and thethickness “m” thereof is 0.99 mm. The width of the stress absorbing part26 is 4 mm and the thickness thereof is 0.3 mm.

On the other hand, the semiconductor device according to the comparativeexample shall not have the groove 24 (the stress absorbing part 26) inFIG. 10 and others shall be the same in structure. A table 1 showstemperature and stress at the maximum stress in the part where theprotrusion part 22 is bonded to the substrate 10 (referred to as aground connection part) at a temperature cyclic test (−55° C. to 125°C.).

TABLE 1 Ground connection part Maximum stress Structure (Temperature:−55° c.) Groove is not provided 3.75 Mpa (comparative example) Groove isprovided 3.52 Mpa (example)

The maximum stress at the ground connection part in the semiconductordevice without the groove 24 according to the comparative example was3.75 Mpa. On the other hand, the maximum stress at the ground connectionpart in the semiconductor device with the groove 24 (i.e., with thestress absorbing part 26) according to the example was 3.52 Mpa.Therefore, it is clear from the simulation that the example according toan embodiment of the present invention could reduce more stress appliedto the ground connection part than the comparative example at atemperature of −55° C.

[Experimental Results]

A table 2 shows the experimental results of the temperature cyclic test(−55° C. to 125° C.) for the semiconductor devices according to theexample and the comparative example with the dimensions and structuresame as those set in the above simulation. In the table 2, the number ofthe semiconductor devices subjected to the temperature cyclic test istaken as a denominator and the number of the semiconductor devicesrejected in conduction tests applied to the devices is taken as anumerator. The reason the semiconductor devices are rejected in theconduction tests seems to be that a part of the protrusion part 22 ispeeled off from the substrate 10 or the protrusion part 22 is whollypeeled off from the substrate 10 at the part where the protrusion part22 of the heat sink 20 is bonded to the substrate 10.

TABLE 2 Temperature cycle Structure 800 cyc 1000 cyc 1200 cyc 1500 cycGroove is not provided 0/30 6/30 13/22 4/7 (comparative example) Grooveis provided 0/30 0/30  0/28  3/26 (example)

With reference to the table 2, although all the semiconductor deviceswithout the groove 24 of the comparative example were acceptable in theconduction tests at a cycle of 800, 6 of 30 semiconductor devices wererejected at a cycle of 1000, 13 of 22 semiconductor devices wererejected at a cycle of 1200, and 4 of 7 semiconductor devices wererejected at a cycle of 1500. On the other hand, for the semiconductordevice with the groove 24 (with the stress absorbing part 26) of theexample according to an embodiment of the present invention, 30, 30, and28 semiconductor devices were subjected to the tests at cycles of 800,1000, and 1200 respectively and, as a result, all of the semiconductordevices were acceptable. 3 of 26 semiconductor devices, however, wererejected at a cycle of 1500.

As described above, it was confirmed that the semiconductor device withthe groove 24 (with the stress absorbing part 26) of the exampleaccording to an embodiment of the present invention could moresubstantially reduce the ratio in which semiconductor devices arerejected in the conduction tests carried out after the temperaturecyclic tests than the semiconductor device without the groove 24 of thecomparative example. For this reason, it was confirmed that the exampleaccording to an embodiment of the present invention was effective forpreventing the protrusion part 22 from being peeled off from thesubstrate at the part where the protrusion part 22 is bonded to thesubstrate 10.

According to the present invention, the stress absorbing part having lowrigidity is provided for the heat sink to allow reducing stress causedby the warp of the semiconductor device at the part where the protrusionpart of the heat sink is bonded to the substrate and preventing theprotrusion part from being peeled off from the substrate at the partwhere the protrusion part is bonded to the substrate. This can hold astable electrical connection between the heat sink and the ground.Consequently, a highly reliable semiconductor device can be provided.

What is claimed is:
 1. A semiconductor device comprising: a substratewhose surface is made of an insulation material; a semiconductor chipflip-chip connected on the substrate; and a heat sink bonded to thesemiconductor chip via a thermal interface material and fixed to thesubstrate outside the semiconductor chip; wherein the heat sink has aprotrusion part protruding toward the substrate and bonded to thesubstrate via a conductive resin between a part bonded to semiconductorchip and a part fixed to the substrate, and wherein the heat sink has astress absorbing part.
 2. The semiconductor device according to claim 1,wherein the stress absorbing part has lower rigidity than the partexcluding the stress absorbing part of the heat sink.
 3. Thesemiconductor device according to claim 1, wherein the stress absorbingpart is thinned by a groove provided on the surface of the heat sinkopposing the substrate.
 4. The semiconductor device according to claim3, wherein the number of the grooves provided thereon is two or more. 5.The semiconductor device according to claim 1, wherein he protrusionpart is arranged to surround the semiconductor chip and the stressabsorbing part is arranged inside or outside the protrusion part.
 6. Thesemiconductor device according to claim 5, wherein the stress absorbingpart is arranged adjacent to the protrusion part.
 7. The semiconductordevice according to claim 1, wherein the stress absorbing part includesa bottomed hole provided in the surface of the heat sink opposing thesubstrate or a through hole.
 8. The semiconductor device according toclaim 1, wherein the heat sink is made of Cu, Al, or AlSiCu ceramic. 9.The semiconductor device according to claim 1, wherein the protrusionpart is bonded an electrode arranged on the substrate via the conductiveresin, and the electrode is electrivally connected to a ground.